От: fpga journal update [news@fpgajournal.com]
Отправлено: 25 февраля 2004 г. 2:33
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol II No 8


a techfocus media publication :: February 24, 2004 :: volume II, no. 8


FROM THE EDITOR

Flash-, antifuse-, and EE-based programmable logic have some compelling benefits for high-volume, moderate-density, moderate-performance applications. If your design requires low-power, small-footprint, low-cost, and high-security, check out this week’s first feature article on non-volatile FPGAs and CPLDs.

Our second new article this week describes how BeThere Technologies developed a high-performance hardware/software system using Impulse C from Impulse Accelerated Technologies to create a sophisticated video conferencing application on Altera’s Stratix devices with Nios processor cores.

Thanks for reading!

If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal

LATEST NEWS

Tuesday, February 24, 2004

Essex Receives 3-D Imaging Patent Notice

Teradyne Connection Systems to be Official Sponsor of the International Engineering Consortium's DesignCon East 2004

National Instruments Releases Suite of PCI-Based 100 MS/s Mixed-Signal Instruments

Monday, February 23, 2004

Synopsys to Acquire Monolithic System Technology (MoSys)and Accelerant Networks

New Xilinx ISE 6.2i Software Combined with Virtex-ii Pro Devices Results in the Highest FPGA Performance Advantage Ever

TransEDA and EVE Team to Provide Code Coverage for Hardware Verification; Linking VN-Cover Emulator and ZeBu Helps Accelerate SoC Design Cycle

Teradyne Connection Systems Joins UXPi - Unified 10 Gbps Physical-Layer Initiative

Synplicity's FPGA Synthesis Software Delivers Enhanced Support for Xilinx's ISE 6.2i

Mindspeed Extends Support for ``Off-the-Shelf'' Backplane Solutions with FPGA Interoperability

Altera Net Seminar: Design with New High-Density FPGAs and Reduce Your System Costs

Wednesday, February 18, 2004

TI Unveils Power Line Modem with E-Meter Demonstration Platform at 2004 Developer Conference

Hier Design's Salil Raje Featured Panelist at FPGA 2004 to be Held February 22-24 in Monterey, Calif.; Panelists Will Debate ''FPGA Tools: Hand-Me Downs or Tailor Made?''

John Dvorak to Keynote Mentor Graphics 20th Annual International User Conference

Tuesday, February 17, 2004

Altium Nexar Release Heads ''LiveDesign-enabled'' 2004 Product Line-up; Application Allows Mainstream Engineers to Create Embedded Systems on FPGAs

Synplify Pro 7.5 Software Provides Excellent Results For Altera's New Stratix II Devices

Xilinx Unveils End to End Programmable Solutions for the Entire Line Card to the Backplane

Xilinx Ships World's First Advanced Switching Solution Based on PCI Express Architecture

HARDI Electronics Introduces Three New Prototyping Boards At DATE; New Boards Add Ethernet, USB And Analog Video Capability To The HAPS Modular ASIC Prototyping System

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CURRENT FEATURE ARTICLES

All is Not SRAM
A survey of flash, antifuse, and EE programmable logic
DSP on FPGA Reduces System Cost
BeHere Technologies Harnesses Stratix with ImpulseC
Peter Baran, Be Here Technologies
Ralph Bodenner, Impulse Accelerated Technologies
Joe Hanson, Altera
Emulation on the Cheap
ASIC prototyping with FPGAs
Aurora Lightweight Gigabit Serial Protocol
by Abhijit Athavale, Xilinx, Inc.
SoC Prototyping Requirements
by Raj Mathur, Aptix Corporation
Mr. Moore's Wild Ride
90nm FPGAs go mainstream
Stratix II
Altera unveils new 90nm architecture
Synthesis Shootout

Benchmarking synthesis tools
On-Chip Debugging

Built-in Logic Analyzers on your FPGA

All is Not SRAM - A survey of flash, antifuse, and EE programmable logic

There are PCs, but there are also Macs. There is Windows, but there is also Linux. There are automobiles, but there are also motorcycles. For every mainstream movement, there is an alternative subculture – the twenty-percent faithful who traverse the road less traveled. In FPGA, the mainstream is SRAM. The two largest FPGA suppliers have engaged in a years-long battle for SRAM supremacy, and the result is a mature, well-developed, and highly capable technology. SRAM devices have raced to ever higher densities, faster clock speeds, more robust design environments, and more complete IP portfolios, fueled by explosive competition, particularly in the telecom market. At the same time, however, other technologies have quietly flourished on the sidelines, developing differentiators that may become increasingly important as the programmable logic market grows and diversifies.

Depending on your application, there are several compelling reasons you might want to consider alternatives to SRAM-based FPGAs. The SRAM FPGA offerings on the market right now do certain things very, very well. The latest FPGA devices from Altera and Xilinx offer a very competitive point in the price/performance/density space. If you did your measurements in some bizarre dimensions like gate-megahertz-per-dollar at lowish volumes you’d find SRAM FPGAs near the top of the heap. For many designs, however, alternatives such as flash, antifuse, EE, and the venerable CPLD can offer a better mix of features, performance, and capability. [more]


Reduce Build Costs by Offloading DSP Functions to an FPGA

New development methods and tools simplify the development of mixed processor/DSP/FPGA applications

Peter Baran, Hardware Architect, Be Here Technologies, Inc.
Ralph Bodenner, Software Engineer, Impulse Accelerated Technologies, Inc.
Joe Hanson, Director of Marketing, System-Level Development Tools, Altera, Inc.

In any product development cycle there are multiple opportunities to reduce cost and/or increase functionality. This is particularly true in higher-end DSP applications, which are computationally intensive and performance critical, and require more processing power than can be provided by common microprocessors or low-cost DSP chips. For such applications there are numerous software/hardware alternatives from which to choose, including DSP devices, custom ASICs and field programmable gate arrays (FPGAs). These alternatives offer varying degrees of performance benefits that must be weighed against other factors including cost, power consumption and design time. [more]


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